Review: Cache operation
Suppose the CPU wnat to read the 4 bytes at address 408:
The cache memory will check whether it has the correct value first before reading the RAM !!
Review: Cache operation
The block # 102 is not found in any cache slot:
We must lookup the block # (102) in all slots of the associative cache...
Problem: the running time to
search for a value is
O(N) !!!
A sequential search to lookup a value in a set of N values runs in O(N) time:
The sequential search running time is longer than it takes to read the value from memory !!!
The block # lookup will use a parallel search method !!!
Prelim: how to find
block # using
memory addresses
Bridging the discrepancy: the CPU uses memory addresses
But the associative cache stores block numbers to identify memory locations
Prelim: how to find
block # using
memory addresses
Bridging the discrepancy: how to convert a memory address into a block number
Method: block # = remove last 2 bits from memory address !!
Prelim: how to find
block # using
memory addresses
Graphically explained: how to convert a memory address into a block number
Method: block # = remove last 2 bits from memory address !!
The structure
of an associative cache memory
This is the structure of an associate cache memory circuit:
I will explain the circuit in a piecemeal fashion next...
The structure
of an associative cache memory
The input signals and output signals of the associative cache:
The associative cache must return the data in the requested memory address to the CPU
The structure
of an associative cache memory
We compare the requested block number with the block number stored in slot 1:
But wait: the slot must be valid too to have a cache hit !!!
The structure
of an associative cache memory
If block numbers are equal and valid=1, we have a cache hit:
Let's take a look at how to return the data when we have a cache hit...
The structure
of an associative cache memory
We use the cache hit signal to filter the value in the given cache slot:
We will collect all these output later with OR gates !!!
The structure
of an associative cache memory
REPEAT: We compare the requested block number with the block number stored in slot 2:
As before: the slot must be valid too to have a cache hit !!!
The structure
of an associative cache memory
If block numbers are equal and valid=1, we have a cache hit:
Now return the data when we have a cache hit...
The structure
of an associative cache memory
We use the cache hit signal to filter the value in the given cache slot:
And so on... Let's look at how to detect whether there is a cache hit
The structure
of an associative cache memory
If any one of the comparison outputs 1, there is a cache hit:
Let's look at how to return the data in a slot when there is a cache hit
The structure
of an associative cache memory
We collect all the outputs with a number of OR gates:
This is the
(simplified) schema for
a associative cache memory
(I left out circuitry to
read the RAM when there is
a cache miss)
The Equals? circuit
Function computed by the Equals? circuit:
The output = 1 if both input numbers are equal and output = 0 otherwise
The Equals? circuit
Suppose we have a eq1? circuit that compute the equality of 2 bits:
Question: what basic gate computes the eq1? boolean function ???
The Equals? circuit
The Xnor (exclusive Nor) gate computes the eq1? (1 bit equals) function:
We will use the eq1? circuit to construct the equals? circuit.
The Equals? circuit
The first bit of the (binary) numbers must be equal:
The Equals? circuit
The second bit of the (binary) numbers must be equal:
The Equals? circuit
And so on: all bits of the (binary) numbers must be equal:
Comment: the eq1? circuit is actually an Xnor gate !
Strength and weakness of the associative cache
Strength: flexibility
When a new (4 bytes) value is stored into a slot, the associative cache can use any slot
Strength and weakness of the associative cache
Strength: flexibility
We can use the slot given in the above figure....
Strength and weakness of the associative cache
Strength: flexibility
Or another slot as given in the above figure....
Strength and weakness of the associative cache
Weakness: requires millions of compare circuits
That's a lot of hardware !!!