CS355 Sylabus

Computer Buses

A bus is a set of wires used to transfer data between different devices in a computer
A bus is akin to a "pneumatic tube" used in drive-up banking locations to transport "item" from the client to the bank-representative and back.
So in other words: a bus is used to make communication possible between different devices that are connected to the bus
There are many different types of buses used inside a computer.
Some of the more well-known buses used in a PC today are:
- the ISA bus (developed by IBM)
- the PCI bus (developed by Intel)

The PCI bus:

The original PCI bus is a 32-bit bus that normally runs at a maximum of 33 MHz (this is the clock rate, so the PCI is an example of a synchronous bus protocol - see later).

PCI has evolved into the PCIe (express) bus:

PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe, is a high-speed serial computer expansion bus standard designed to replace the older PCI, PCI-X, and AGP bus standards.
Wikipedia page: click here

This is what some PCIe slots look like:

PCI Express slots (from top to bottom: x4, x16, x1 and (another) x16), compared to a traditional 32-bit PCI slot (bottom)

Here is the homepage of the Special Interest group for PCI: click here

Every type of bus has its own bus protocol
A bus protocol consists of:
The steps include timing relationships that must be followed to guarantee that a data transfer operation is successful

A bus protocol contains a sequence of rigid (= fixed) steps that communicating devices must follow to complete a data transfer operation.

The rigid steps is necessary to enable machines to communicate with each other... machines are not as flexible as humans and must follow a very rigid course to make a (complex) task (such as data transfer) successful

Basically:

If CPU sends some signal A then it means some request to one specific device
The protocol specifies how a device must answer the signal when the device has perform the task

The reverse is also true:

If a device sends some signal X then it means some request to the CPU
The protocol specifies how the CPU must answer the signal when the CPU has perform the task

Summary:
Bus protocol contains:
- Specification for each signal and its meaning
- A timing diagram that specify the steps that communicating devices must follow
We will study a very simple bus protocols that distill the essence of communication techniques between automata (machines).
Bus protocol are often open (international) standards.
The reason to standardize a bus protocol is:
- Economics
In order to connect a device on, say a PCI bus, the device must implement the PCI bus protocol to the letter
On the other hand, any device that implements the PCI bus protocol to the letter, can be connected to a PCI bus.
Here is a little secret: most bus protocols that are economically successful are/were open standards, i.e., manufacturers do not need to pay royalty to the developer of the bus protocol in order to manufacture devices that implements that bus protocol
PCI is such open standard.
With an open standard, manufacturers of computer devices can compete fairly, for example, each manufacturer of network card can compete in the PC market by making sure that their network cards implement the PCI bus protocol (to the letter). They will be certain that their network card will work when it is inserted into any PC

The are two types of bus protocols:

Synchronous bus protocols:
- The bus signals include a "CLOCK" signal (a clock signal is used to pace events, see: click here
- events on a synchronous bus are paced by the "CLOCK" signal of the bus
Asynchronous bus protocols:
- The bus signals include a "Master Sync" and a "Slave Sync" signals
- Events on a synchronous bus are paced by the master and slave signaling each other's readiness.

To understand the operations of these two type of protocols, you have to consider the capabilities of the devices inside a computer... All that these devices (CPU, memory, IO device....) can do is sense.... They cannot use sight to make preparations to communicate (e.g., when you see the teacher walk to the black board, you may start picking up your pen and paper and prepare to write down any notes).

So you need to take explicit steps to ensure that the devices are "ready" when the communication occurs.

These "extra steps" are synchronization steps. An example of an "extra step" in communication is: before saying something to someone, tell that someone that you are gonna say something to him. (That may sound dumb in human communication, but that's what computers (dumb machines :-)) have to do first.)

In essense:

There must be some agreement between the CPU and a device when when a request sent on the System Bus is ready

In an asynchronous bus, the request ready indication is an explicit signal:

In an synchronous bus, the request ready indication is an implicit signal:

The request signals used by the sending device must be ready after some time t₁ from the start
The return data signals from the requested device must be ready after some time t₂ from the start

Quiz

I have a deaf, mute and blind pitcher and catcher.

The pitcher have remember where the catcher is and he can always aim the ball right at the catcher's chest.

The catcher can catch a ball as long as he has his mitten held to his chest.

However, the catcher cannot always keep his mitten held to his chest all the time.

Puzzle:

The pitcher has a number of balls.
On one of the balls, the pitcher has written an important message (in Braille)
How can the pitcher make 100% sure the catcher will catch that ball ???

If you can solve this puzzle, you have discovered an asynchronous protocol to signal that the pitcher is ready !!!