Background:
CPU operation (instruction execution cycle)
Review: the CPU repeatedly executes these steps in the instruction execution cycle:
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These steps must be executed in the given order !!
We will now study how to sequence events using clock signals
Sequencing events inside the CPU
Simplification: consider only the portion of the datapath that connect the registers and the ALU:
The sequencing also applys when MAR and MDR are connected to the datapath.
Sequencing events inside the CPU
(1) To perform an operation, data stored in registers must first be sent to the ALU
The source operands for the ALU are stored in the A-buffer and B-buffer help-registers
Sequencing events inside the CPU
(2) The computed result is then stored in the destination register
How do we make sure that these 2 events happens sequentially ??? (Hint: we need a clock !)
Sequencing events inside the CPU
Reminder: A-buffer, B-buffer and the registers are memory circuits
Recall how memory circuits operate !!
Controlling the
time when
memory circuits
are updated
The values stored in a memory circuits is only updated when it receives a clock signal:
Sequencing events inside the CPU
How do we fetch the data from registers into the A-buffer and B-buffer registers ?
Sequencing events inside the CPU
Data from registers are fetched into A-buffer and B-buffer at the clock pulse:
Sequencing events inside the CPU
After a little while, the A-buffer and B-buffer will become de-activated:
The A-buffer and B-buffer outputs will remain constant (because the clock = 0)
Sequencing events inside the CPU
How do we make sure the registers are updated after the event of updating A,B-buffers ?
Notice the time "Now" is after we have updated A,B-buffers !!!
Sequencing events inside the CPU
Answer: use a clock signal that pulses after the clock 1:
The delayed clock signal will ensure that updating registers happens after updating A,B-buffers
Controlling the
activation time of
components inside the CPU
Activating timing can be chronologically controlled by using a "N phase clock":
Our CPU will use a 4 phased clock because there are 4 different chronological milestones in the CPU (you will make this circuit in a project).
Controlling the
activation time of
components inside the CPU
Let's activate the components inside the CPU in correct chronological order:
What must happen first in an instruction execution cycle ???
Controlling the
activation time of
components inside the CPU
(1): fetch the next machine instruction and store it in the instruction register (IR):
Phase 1 of the clock happens the earliest of all phases chronologically !!
Controlling the
activation time of
components inside the CPU
The newly fecthed machine instruction will send out control signals:
What must happen next in an instruction execution cycle ???
Controlling the
activation time of
components inside the CPU
(2): fetch the operands from the registers and store them in the A & B-buffers:
Phase 2 of the clock always happens after Phase 1 !!
Controlling the
activation time of
components inside the CPU
Result: we fetch the operands for the fetched instruction in Phase 1 !
What must the CPU update next in an instruction execution cycle ???
Controlling the
activation time of
components inside the CPU
(3): update the MAR using B-buffer data and/or compute with the data in A & B-buffers:
Phase 3 of the clock ensures this happens with correct values inside the A & B-buffers !!!
Controlling the
activation time of
components inside the CPU
Result: (a): MAR=B-buffer and/or (b): the ALU has computed the correct result
What must the CPU update next in an instruction execution cycle ???
Controlling the
activation time of
components inside the CPU
(4): (a): store the result in a register or (b): store the result to memory:
Phase 4 of the clock will ensure that we will use a correctly computed value from the ALU
Controlling the
activation time of
components inside the CPU
The instruction execution cycle is completed and a new cycle starts immediately:
And so on...