Review: CPU Architecture

We have now studied various parts of the CPU:

Review: CPU Architecture

We have studied how to forward the operands from the registers to the inputs of the ALU:

Review: CPU Architecture

We have studied how a (simple) ALU works:

Review: CPU Architecture

We have studied how to forward the result from the ALU output to the registers (for storage):

Review: CPU Architecture

We have studied how the CPU transfer data from the memory to its MDR register:

Review: CPU Architecture

We have studied how the CPU transfer data from its MDR register to the memory:

What will we do next...
 

  1. We will add extra circuitry to the CPU to allow the transfer between registers and the MDR

    This will complete the whole picture of the CPU

  2. How to control the timing the instruction execution actions:

      • In order the execute a machine instruction, the steps of the execution process must be carried out in a specific ordering

Review:   the 3 types of instructions that the CPU can execute

The basic types of instructions that the CPU (= computer) can execute are:

  1. Data moving (copying) instructions:

      1. ldr r0, [r1]
      2. str r0, [r1]

  2. Arithmethic/logic/shift instructions:

      • add r0, r1, r2
      • mov r0, r1
      • mov r0, #7

  3. Branching instructions:

      • br label ≡ mov pc, #label

    Note:   "data flow"-wise, a branch instruction is the same as a arithmetic instruction

(Issue #1) Circuitry to allow the CPU to transfer data between registers and the MAR and MDR registers

We will need to create new path ways in the CPU to connect the registers to the MAR and the MDR:

The new paths (routes), are created by adding multiplexors !!!

(Issue #1) Circuitry to allow the CPU to transfer data between registers and the MAR and MDR registers

There is a network of pathways inside the CPU used to route (binary) data:

This pathway makes it possible transfer data from any register to any other register in the CPU

Path way used to execute arithmethic/logic instructions

The following path way is used to execute ALU instructions (e.g.: add r0, r1, r2 and mov r0, r1):
 

This path fetches data from registers to the ALU and send the result to a register

The branch instruction is included because the PC (program counter) is one of the registers !!!

Path way used to execute load instructions

To execute a "load" instruction (e.g.: ldr r1,[r0]), the CPU must send the address in a register on the address bus to read the memory location:

Step 1: we need a path to transfer data from a register to the MAR

Path way used to execute load instructions

After the data from memory is fetched in the MDR register, we must forward the fetched data into a register:

Step 2: we will also need a pathway from the MDR register to registers

Path way used to execute store instructions

To execute a "store" instruction (e.g.: str r1,[r0]), the CPU must send the address in a register on the address bus to write it to memory:

Step 1: we need a path to transfer data from a register to the MAR register

(Issue #1) Circuitry to allow the CPU to transfer data between registers and MDR

To execute a "store" instruction (e.g.: str r1,[r0]), the CPU must also send the data in a register on the data bus to read the memory location:

Step 2: we will also need a pathway from the registers to the MDR register

(Issue #2) Event timing in the execution of a machine instruction
 

Review:   the CPU repeatedly executes the following steps in the instruction execution cycle:

  1. Fetch the next machine instruction (from memory at location given by the PC)

  2. Decode the fetched machine instruction

  3. Fetch the operands

  4. Execute the machine instruction (= perform the operation)

These steps must be executed in the above ordering !!

We will study how to sequence events using clock signals

Datapath

  • Data path = the circuit inside the CPU that connects these components:

      • Registers (special and general purpose registers)        
      • ALU

  • The data path is the "highway" of the CPU:

      • Operands used by every machine instruction are transfered on (at least some part of) the datapath

  • Data flow direction in the datapath:

      1. Datapath first send data from the source (= register or MDR) to the ALU (in order to perform the computation)

      2. The datapath then send the result from the ALU to the destination register (= registers or MDR)

In CS355, we will study (and build in a project) a CPU with the following simple data path:

The dataflow through the datapath is shown in this figure:

Presentation of the CPU

  • As you have seen previously, there are many circuits needed to perform just a part of the operation of the CPU...

  • Therefore:

      • It is impossible to draw out all the circuits in the discussion of the whole CPU !!!     

  • I will (and have to) draw heavily on your understanding of the previously discussed material when I present the CPU in the next few slides !!!

    In other words: the presentation will be a bit more abstract (it's unavoidable)...