The techniques are best illustrated with some examples.
The chip has
- N address lines (and thus have 2N addresses)
- 1 data line (and thus 1 bit per address)
- A number of control lines (signals).
Among these are:
- Enable: this signal is used to activate the memory chip
- R/W: this signal is used to choose an operation
Presently, the most economical chips made is the 64M x 1 or the 128M x 1 chips.
Although each memory chip only has 1 bit per address, we can easily build 8 bit memory per address using these memory chips.
The following is a connection scheme that connects 8 "n x 1" memory chips into a "n x 8" memory:
Notice that:
- The MEM signal of the system bus is used to
activate the memory chips
(MEM = 1 if the CPU wants to access the memory !)
- The R/W signal of the system bus is used to
choose the operation on the memory chip.
- Each memory chip is used to read and write a separate bit of the databus. (the data bit of different memory chips are connected to a different wire of the data bus)
These machines now have 32 or 64 bit databus and in one single read operation, the CPU can read or write 32 or 64 bits at a time. (You may wonder how such machine will read a byte... the CPU will read 32 or 64 bits from memory that contains the byte it wants and "extract" the byte...)
SIMM (symmetric in-line memory module) memory modules look like this:
And they are placed in a "SIMM socket" on the motherboard of the computer. The following picture shows a SIMM slot:
The following picture shows a mother board:
SIMM's, come in 30 and 72 pin sizes the latter now becoming the standard. Older boards used by Intel 386, and some 486 machines have 30 pin sockets. The 30 pin SIMM module was designed for 8-bit data flow, and are generally placed in groups of four to give a 32-bit data path. (4x8 = 32).
The 72 pin SIMM was designed for 32-pin operation, and it is 50% longer in physical length. As the databus width grew and 64 bit buses became prevalent, the 72 pin SIMM would can be 'pair-up' to provide 64 bit data at once. But that caused a space problem on the motherboard and The answer was the DIMM (dual in-line memory module).
DIMMs have 168 pins and was designed to support 64-bit read/write operations. DIMMs look similar to the older SIMM but differ in a key area. The DIMM is highly economized on space used for pins. The DIMM module uses both sides of the board, having 84 pins on each side (2 x 84 = 168 pins). Each pin is completely independent of the others, and makes a separate electrical contact. The density of the DIMM memory module is increased with only the slightest increase in the module's physical size.
The chip has
- N address pins or lines (and thus have 2N addresses)
- 8 data pins or lines (and thus 8 bits per address)
Granted, in those days, the "n" in "n x 8" is much less... like "1K x 8" to about "16K x 8"... and you pay a lot more money to buy them :-(
The following figure shows how we can use 4 "1K x 8" to construct a "4K x 8" memory:
Notice that:
- Each memory chip has 10 address pins
- The address bus has 12 address pins
- The most significant 2 address bits selects exactly
one of the memory chips to become active for reading/writing
while all other memory chips are not active (with tri-state-buffers
off !) because:
- The Decoder will send out exactly one 1, and the other 3 outputs are 0