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Defining your own components in EDiSim

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• User-defined components
  • Previously, we studied the multiplexor circuit:

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  • Important fact:

    A multiplexor is a very important digital circuit We often need to use many of the multiplexor circuits in a project

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  • EDiSim has a "macro" facility to allow users to define his/her own digital components once and use them many times later in the circuit simulation

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• Defining your own circuit component
  • The syntac to define a user-define circuit component is:

    Define ComponentName inputSignals | outputsignals ; DigitalCircuit1; DigitalCircuit2; .... .... Endef;

    Between the keywords Define and Endef, you write:

    EDiSim digital circuit program (that you have learn before) that: Uses the inputSignals (instead of switches) as input signals Uses the outputSignals (instead of probes) as output signals

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• Example defining your own component: multiplexor
  • We can consider the multiplexor as an "higher level" digital component circuit as follows:

    The mutliplexor circuit has:

    The following input signals: 4 data inputs (signals) i3, i2, i1 and i0 2 control inputs (signals) c1 and c0 The following out signal: out

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  • We can define our own Mux component called MyMux as follows:

    Define MyMux i3 i2 i1 i0 c1 c0 | out; Not 7a c0 not_c0; Not 8a c1 not_c1; And 1c i3 c0 c1 out_3; And 2c i2 c0 not_c1 out_2; And 3c i1 not_c0 c1 out_1; And 4c i0 not_c0 not_c1 out_0; Or 3d out_3 out_2 out_1 out_0 out; Endef;

    The following diagram shows the signal names I used in the above macro definition:

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  • After we have define the MyMux macro (= user-defined component) , you can use it EDiSim like a built-in component.

    Example:

    Define MyMux i3 i2 i1 i0 c1 c0 | out; Not 7a c0 not_c0; Not 8a c1 not_c1; And 1c i3 c0 c1 out_3; And 2c i2 c0 not_c1 out_2; And 3c i1 not_c0 c1 out_1; And 4c i0 not_c0 not_c1 out_0; Or 3d out_3 out_2 out_1 out_0 out; Endef; /* ============================================================== Use MyMux in a EDiSim circuit ============================================================== */ Switch 4a sw0 '0' ZERO; Switch 3a sw1 '1' ZERO; Switch 2a sw2 '2' ZERO; Switch 1a sw3 '3' ZERO; Switch 7a sw4 '4' ZERO; Switch 8a sw5 '5' ZERO; MyMux 5c sw3 sw2 sw1 sw0 sw5 sw4 | or_out; Probe 3e or_out;

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  • Example Program: (Demo above code)                                                

    /home/cs355001/bin/cs355sim   /home/cs355001/demo/circuits/mux.m

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• Common mistake when defining a macro
  • Important note:

    Do not use the same signal name in the input/output twice !!! (The EDiSim system will be utterly confused -- it's like defining the same variable multiple times !!!)

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  • Never do this when you define a macro:

    Define MyMacro a b c a | z ; Or: Define MyMacro a b c d | a ;