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ARM instruction encoding

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• ARM processor
  • ARM:

    ARM = ACORN/Advanced RISC Machine is a family of Reduced Instruction Set Computing architecture for computer processors Wiki: click here

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  • The ARM processor nowadays is used in many appliances:

    Mobile phones Tablet computers EBook readers Smart TV Cable TV boxes Blue Ray/DVD players              Microwave oven Washing machines etc. etc (See: click here)

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• ARM instruction code for the move instruction
  • ARM instructions have a fixed length format:

    Each ARM instruction is encoded (= represented) in 32 bits

  • Here is a full description of the ARM instructions with their encoding that I used to make the teaching material on this webpage: click here

    I will discuss the encoding for the move instruction that store a value into the first register register r0 of the ARM processor - as a comparison to the same instruction in the M68000 processor

    The documentation for the ARM's move instruction is on page 10 of the ARM instruction set document

  • The assembler syntax to move the value x to register r0 (= the first register of the ARM processor) is:

    mov r0, #x

    The format to encode the instruction to move the value x to register number dest is:

    mov r0, #x is encoded in ARM as: +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | | | | |0|0|1|1|1|0|1|S|x|x|x|x| dest | value (x) | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ <-----> <-----> <-----> 1 1 1 0 "mov" not used unconditional (S = 0 means: don't set the condition codes) (S = 1 means: set the condition codes according to the result of the operation)

    Here are some samples of the move instructions and their instruction codes:

    // Instruction code mov r0, #1 // E3A00001 = 1110 0011 1010 0000 0000 0000 0000 0001 mov r5, #1 // E3A05001 = 1110 0011 1010 0101 0000 0000 0000 0001 mov r0, #127 // E3A0007F = 1110 0011 1010 0000 0000 0000 0111 1111 mov r0, #128 // E3A00080 = 1110 0011 1010 0000 0000 0000 1000 0000 mov r0, #129 // E3A00081 = 1110 0011 1010 0000 0000 0000 1000 0001 mov r0, #255 // E3A00FFF = 1110 0011 1010 0000 0000 0000 1111 1111

    The interpretation of the first instruction code is as follows:

    mov r0, #1 // E3A00001 = 1110 0011 1010 0000 0000 0000 0000 0001 When we put this bit pattern in the in the format of the mov instruction, you can identify the meaning of each bit easier: 1110 0011 1010 0000 0000 0000 0000 0001 1 1 1 0 0 0 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | | | | |0|0|1|1|1|0|1|S|x|x|x|x| dest | value (x) | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ <-----> <-----> <-----> 1 1 1 0 "mov" not used unconditional

    You can see that the register r0 is encoded by the 4 bits register 0 0 0 0 in the middle of the instruction code.

    The value 1 is encoded by the 12 bits 0 0 0 0 0 0 ... 0 1 at the end of the instruction code.

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  • Example Program: (Demo above code)                                                
    • Prog file: /home/cs255001/demo/instruction-encoding/arm/asm-prog.s

    How to run the program:

    To compile:   /home/cs255001/bin/as255 asm-prog.s          Look inside the list file asm-prog.list

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  • To show you that that the 4 bits register 0 0 0 0 in the middle of the instruction code encodes the register, I used r5 in the 2nd instruction:

    mov r5, #1 // E3A05001 = 1110 0011 1010 0000 0101 0000 0000 0001 When we put this bit pattern in the in the format of the mov instruction, you can identify the meaning of each bit easier: 1110 0011 1010 0000 0101 0000 0000 0001 1 1 1 0 0 0 1 1 1 0 1 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | | | | |0|0|1|1|1|0|1|S|x|x|x|x| dest | value (x) | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ <-----> <-----> <-----> 1 1 1 0 "mov" not used unconditional

    You can see that the register r5 is encoded by the 4 bits register 0 1 0 1 in the middle of the instruction code.

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• Final comment
  • The ARM processor is a RISC processor with less complex instructions

  • One of the consequence of this "simplified" instruction set is:

    The ARM processor cannot store an arbitrary large value in a register using one instruction

    (Recall the M68000 processor has a longer but slower variant that can handle any value and a shorter variant that can be used for smaller values.

    The ARM processor does not have the longer (= more complex) variant of the move instruction !!!)

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  • We will learn later that:

    The ARM processor requires two (2) instructions to store a large value into a register !!!