- The format
of a Makefile
is as follows:
# Comment lines can appear anywhere Macros section (will be discussed later if time permits) Rules section
- Macros section:
- Contains zero or more macro definition(s)
We will discuss macros later in this webpage
- Rule section:
- Contains one or more make rule(s) used to specify file dependency and how to create the target file in the dependency
- Rules in a
Make file:
- A rule will:
- Specify a
target file name
- Speficy the
list of files that
the target
depends on
- Specify how to create the target (when one or more of the dependency files is updated)
- Specify a
target file name
- A rule will:
- Syntax
of a Make rule:
targetName : depend-on-file1 depend-on-file2 .... <TAB> UNIX-command-1 # List of commands <TAB> UNIX-command-2 # used to create the ... # target file <TAB> UNIX-command-NExplanation:
- The
first line of
a make rule
is the dependeny line
and
it specifies:
- The target file name targetName and
- The list of files that the target file depends on: depend-on-file1, depend-on-file2, ...
- A list of UNIX commands
that are used to
create the
target file when
one or more of the
depend-on files
have be updated
Note:
- The UNIX command
must be
preceeded by
a <TAB> character
- If a line does not start with a <TAB> character, then Make will consider this to be the end of the make rule
- The UNIX command
must be
preceeded by
a <TAB> character
- The
first line of
a make rule
is the dependeny line
and
it specifies:
- Comment:
- You are responsible for composing (= writing) the commands UNIX-command-1, UNIX-command-2, ... UNIX-command-N that will correctly create the target targetName !!!
- Example of a make rule:
hello.o: hello.c # Meaning: target hello.o depends of hello.c <TAB> gcc -c hello.c # Command to keep the target up to date
Explanation:
- Line 1
hello.o: hello.c
specifies that the target file hello.o depends on the file hello.c
- Line 2:
<TAB> gcc -c hello.c
tells the Make application to use the UNIX command "gcc -c hello.c" to create the the target file hello when the file hello.c is updated
- Line 1
XXXXXXX
- Now consider a C program that consists of
2 program files:
- We have a C program that consists of
2 program files:
- func5a.c
- func5b.c
The header file for func5b.c is:
- func5b.h
- The final executable file
that we want to create is called:
- main
This is the target
- The following figure shows the
dependencies between the
different files:
- We have a C program that consists of
2 program files:
- We can now create the follow Makefile
that represents the
above dependencies:
main: func5a.o func5b.o # main depends on func5a.o and func5b.o gcc -o main func5a.o func5b.o func5a.o: func5a.c # func5a.o depends on func5a.c gcc -c func5a.c func5b.o: func5b.c gcc -c func5b.c func5a.c: func5b.h touch func5a.c func5b.c: func5b.h touch func5b.c
Note:
- The command touch file
updates the
modification time time of the file
file to the
current time
(The newer time stamp will trigger the maintenance command for the file file !!!)
- The command touch file
updates the
modification time time of the file
file to the
current time
- Alternately, we can remove the
touch command by
short-circuiting the
dependencies:
main: func5a.o func5b.o # main depends on func5a.o and func5b.o gcc -o main func5a.o func5b.o func5a.o: func5a.c func5b.h # func5a.o depends on func5a.c gcc -c func5a.c # and (indirectly) also on func5b.h func5b.o: func5b.c func5b.h gcc -c func5b.c
- Example Program:
(Demo above code)
- The func5a.c Prog file: click here
- The func5b.c Prog file: click here
- The func5b.h header file: click here
- The Makefile: click here
How to run the program:
- Right click on link(s) and
save in a scratch directory
- To compile: make
- To run: main
- Result:
- The first time we run
make, you will see:
UNIX>> make gcc -c func5a.c gcc -c func5b.c gcc -o main func5a.o func5b.o
and the make utility creates the target main
- Now, run make
again, and you will see:
UNIX>> make `main' is up to date.
The make utility has determined that main is more recent than the dependency file func5a.o and func5b.o and skips the compilation process !!!
- Next, edit func5a.c
(add a space somewhere in the program),
save it and then run
make again:
UNIX>> make gcc -c func5a.c gcc -o main func5a.o func5b.o
The make utility has determined that func5a.o is stale and runs the command(s) to re-compile the source file func5a.c and link the object files to main !!!
- Now, edit header file
func5b.h
(add a space somewhere in the program),
save it and then run
make again:
UNIX>> make gcc -c func5a.c gcc -c func5b.c gcc -o main func5a.o func5b.o
The make utility re-compiles both func5a.c and func5b.c because of the following dependencies specified in the Makefile:
func5a.o: func5a.c func5b.h gcc -c func5a.c func5b.o: func5b.c func5b.h gcc -c func5a.c
- The first time we run
make, you will see:
- You have
already
seen a multi-targets
makefile !!
- Example: There are
3 targets
(main,
func5a.o and
func5b.o) in the following
makefile:
main: func5a.o func5b.o gcc -o main func5a.o func5b.o func5a.o: func5a.c func5b.h gcc -c func5a.c func5b.o: func5b.c func5b.h gcc -c func5b.c
- Using make for a specific target:
make targetName # Make the target targetNameI.e.: we can make different targets by using an additional argument to the make command !
Example:
make func5a.o make func5b.o make main
- The default target:
- Default target =
the target used by make when
the user has not specified
a specific target
- Default target used by the make utility = the first target specified inside a Makefile
Example:
- Makefile:
main: func5a.o func5b.o gcc -o main func5a.o func5b.o func5a.o: func5a.c func5b.h gcc -c func5a.c func5b.o: func5b.c func5b.h gcc -c func5b.c
- The default target is main.
- Default target =
the target used by make when
the user has not specified
a specific target