Multistage interconnection networks (MINs)
 

  • Multistage interconnection networks (MINs):

      • Multistage interconnection networks (MINs) is a class of high speed computer networks consisting of multiple stages

      • Each stage of the computer network is made with some self-switching circuit

  • Due to the self-switching property, MINs are scalable and can connect large number of pairs of endpoints

The Banyan switch: a self-routing switching circuit

The 2×2 banyan switch:

                

  • A (2×2) banyan switch is a self-routing switch with:

      • 2 inputs (0 and 1) and
      • 2 outputs (0 and 1)
      • where the internal route through the switch is set by the first bit of the input

The Banyan switch: a self-routing switching circuit

Operation of the banyan switch:

  • When a 0 appears as the first bit to an (any) input, the banyan switch will set an internal route that connects that input to the the output 0

    Example 1:

                

This goes for the other input as well (see next example)

The Banyan switch: a self-routing switching circuit

Operation of the banyan switch:

  • When a 0 appears as the first bit to an (any) input, the banyan switch will set an internal route that connects that input to the the output 0

    Example 2:

                

 

The Banyan switch: a self-routing switching circuit

Operation of the banyan switch:

  • When an 1 appears as the first bit to an (any) input, the banyan switch will set an internal route that connects that input to the the output 1

    Example 1:

                

This goes for the other input as well (see next example)

The Banyan switch: a self-routing switching circuit

Operation of the banyan switch:

  • When an 1 appears as the first bit to an (any) input, the banyan switch will set an internal route that connects that input to the the output 1

    Example 2:

                

 

Multistage Inteconnection Networks (MINs)

  • The 2×2 banyan switch has been used to build (very) large and scalable self-routing switching networks

  • These switching networks are scalable because:

      • The 2×2 banyan switch is low cost

      • The multistage interconnection networks are contructed only using (multiple) 2×2 banyan switches

        I.e.: there is no additional circuitry necessary !!!

  • We will study the following 2 multistage interconnection networks:

      • The Delta network
      • The Omega network         

The Delta MIN

An 8×8 Delta multistage interconnection network is constructed using 3 layers of banyan switches as follows:

Each rectangle is a 2×2 banyan switch

Interconnecting processors to memory modules using the Delta network

8 processors and 8 memory modules are connected with an Delta network as follows:

 
 

 

Interconnecting processors to memory modules using the Delta network

Example memory access: the path set up by the Delta network between CPU 0 and mem module 4:

 
 

 

Interconnecting processors to memory modules using the Delta network

Example memory access: the path set up by the Delta network between CPU 7 and mem module 4:

 
 

 

The self-routing path set up procedure of the Delta network

The prefix of the memory address is used to set up the path through the Delta network:

 
 

Example: suppose CPU 0 wants to access the memory module 4 (binary 100)

The self-routing path set up procedure of the Delta network

The first bit in the prefix is used to set up the routing in the switch in layer 1:

 
 

The remaining bits of the prefix is forwarded to the output of the switch

The self-routing path set up procedure of the Delta network

The first bit in the remainder is used to set up the routing in the switch in layer 2:

 
 

The remaining bits of the prefix is forwarded to the output of the switch

The self-routing path set up procedure of the Delta network

The first bit in the remainder is used to set up the routing in the switch in layer 3:

 
 

We are done in this example and the path has been set up !!

The self-routing path set up procedure of the Delta network

Example 2: suppose CPU 7 wants to access the memory module 4 (binary 100)

 
 

 

The self-routing path set up procedure of the Delta network

The first bit in the prefix is used to set up the routing in the switch in layer 1:

 
 

The remaining bits of the prefix is forwarded to the output of the switch

The self-routing path set up procedure of the Delta network

The first bit in the remainder is used to set up the routing in the switch in layer 2:

 
 

The remaining bits of the prefix is forwarded to the output of the switch

The self-routing path set up procedure of the Delta network

The first bit in the remainder is used to set up the routing in the switch in layer 3:

 
 

We are done in this example and the path has been set up !!

The Delta network can support concurrent (simultaneous) data transfer

CPU 1 accesses Mem Module 5 and (simultaneosuly) CPU 3 accesses Mem Module 7:

The Delta network can support concurrent (simultaneous) data transfer

CPU 1 accesses Mem Module 5 and (simultaneosuly) CPU 3 accesses Mem Module 7:

The Delta network can support concurrent (simultaneous) data transfer

CPU 1 accesses Mem Module 5 and (simultaneosuly) CPU 3 accesses Mem Module 7:

The Delta network is not a non-blocking network...

Recall:   conflicting (memory) requests

Access requests to the same memory module are conflicting requests

The Delta network is not a non-blocking network...

Recall:   non-blocking interconnection network

A network is non-blocking if all non-conflicting requests can be satisfied

The Delta network is not a non-blocking network...

Consider these 2 non-conflicting memory requests:

 

CPU 0 accesses mem module 2 and CPU 4 accesses mem module 3

The Delta network is not a non-blocking network...

The 2 paths must use the same output in stage 2:

This is an internal conflict (a.k.a.: internal blocking)

The Delta network is not a non-blocking network...

Resolving an internal blocking situation:

 

Only one of the requests will be forwarded....

How/why does the Delta network work ?

After layer 1 of the Delta network, memory requests are "sorted" as follows:

 

Memory requests for addresses that start with 0 and 1 are separated !

How/why does the Delta network work ?

After layer 2 of the Delta network, memory requests are "sorted" as follows:

 

Memory requests for addresses that start with 00, 01, 10 and 11 are separated !

Delta networks are extremely scalable

The Delta network can scale to connect large number of CPUs and memory modules...

Here's a 16×16 Delta network:

Because 2×2 banyan switches are cheap to make and there are no additional switching circuitry necessary !