The Delta Multi-stage Interconnection Networks (MINs)

Multi-stage Interconnection networks
- The cost of the Cross Bar switch grows n² (quadratically) with the number of inputs (and outputs) n
- There is a class of switching fabric that grows in the order of n log(n) with the number of inputs (and outputs) n

The Banyan Switch

A 2x2 Banyan switch has two inputs
- numbered 0 and 1
and two outputs
- numbered 0 and 1
Banyan switch:

The Banyan switch has a switching control built into the switch itself:

Every packet (messages) that comes into the Banyan switch has a header that contains a bit indicating what its destination is (either 0 or 1).
The header is usually the first bit of the packet (message)
If the switch reads the bit and it has value 0, it sends the packet to its upper output (which is marked with 0 in the figure)
If the switch reads the bit and it has value 1, it sends the packet to its lower output (which is marked with 1 in the figure)

By connecting these simple Banyan switching elements in series and parallel, it is possible to route packets in more complicated ways depending on the desired routes to establish.

The Delta Network
- The Delta Interconnection Network is a digit controlled multi-stage interconnection network made up with Banyan Switches
- Here is an example of a 8x8 Delta Network
- Each rectangle represents a 2x2 Banyan Switch

Connecting CPUs to memory with a Delta network

The following picture shows how 8 CPUs are connected to 8 memory modules with the given Delta network:

Note:

The entire memory consists of 8 independent memory modules
The first memory module will store values at a memory address that starts with:
The second memory module will store values at a memory address that starts with:
and so on...
This allows the memory to satisfy multiple memory requests at the same time
(Provided the memory requests are using different memory modules !!!)

(Self) Routing method in Delta Network

A memory request from a CPU will be transmitted as follows:

memory address (sent by CPU) <-----------------------------------> 100aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa +++********************************** ^ |<------------------------------>| | Address for 1 memory module | Routing information

The first bit is used to control the Banyan Switching fabric
After making routing decision, the Banyan Switching removes the routing (first) bit and the rest of the message is forwarded to the next stage.

(Self) Routing in Delta Network - Example 1
- Suppose CPU 1 wants to send an address value to Memory Module 4
- Step 1 of the transmission:
  Because the routing (first) bit is 1 , the entire message (except the routing bit) is forwarded onto the lower connection
- Step 2 of the transmission:
  Because the routing (first) bit is 0 , the entire message (except the routing bit) is forwarded onto the upper connection
- Step 3 of the transmission:
  Because the routing (first) bit is 0 , the entire message (except the routing bit) is forwarded onto the upper connection
- The address value is then "delivered" (connected) to the memory module 4
(Self) Routing in Delta Network - Example 2
- Suppose CPU 6 wants to send an address value to Memory Module 4
- Step 1 of the transmission:
  Because the routing (first) bit is 1 , the entire message (except the routing bit) is forwarded onto the lower connection
- Step 2 of the transmission:
  Because the routing (first) bit is 0 , the entire message (except the routing bit) is forwarded onto the upper connection
- Step 3 of the transmission:
  Because the routing (first) bit is 0 , the entire message (except the routing bit) is forwarded onto the upper connection
- The address value is then "delivered" (connected) to the memory module 4
Concurrent Routing in Delta Network - Example 1
- Multiple requests can be routed simultaneously through the Delta Network
- Example:
  - CPU 1 sends a memory request (address) to memory module 5, and
  - CPU 3 sends a memory request (address) to memory module 7
- Step 1:
- Step 2:
- Step 3:
Concurrent Routing in Delta Network - Example 2
- Example:
  - CPU 1 sends a memory request (address) to memory module 5, and
  - CPU 3 sends a memory request (address) to memory module 7
  - CPU 6 sends a memory request (address) to memory module 1
- Step 1:
- Step 2:
- Step 3:
Output Port Contention
- Just like in the Cross Bar switch, if multiple CPUs request to access the SAME memory module, only ONE request can be granted.
- Example:
  - CPU 1 and CPU 6 both want to access Memory Module 4
- Step 1:
- Step 2:
- Step 3:
- Switch only forwards ONE of the conflicting requests:
Internal Blocking
- It is obvious that multiple requests for the SAME memory module cannot be satified.
- We saw that the Cross Bar switch was non-blocking:
- Unlike the Cross Bar switch, it is also possible for 2 requests destined for different memory modules to be in conflict in the Delta switch.
- Example:
  - CPU 0 sends request to memory module 2, and simultaneously
  - CPU 4 sends request to memory module 3
- Step 1:
- Step 2:
  This kind of conflict happens inside the switching fabric and it is called internal blocking requests
- Again, the switch only forwards ONE of the conflicting requests:

Why does the Delta Switch work ?

It's not difficult to understand how the Delta Switch perform its "magic".
In each stage, the Delta Switch can discover the value of each routing bit
Consider what happens during the first stage of the Delta Switch:
If the routing (first) bit is equal to 0 (zero), then the message is routed towards the TWO UPPER Banyan switches in the SECOND stage
If the routing (first) bit is equal to 1 (one), then the message is routed towards the TWO LOWER Banyan switches in the SECOND stage

Therefore:

Messages arriving into the TWO UPPER Banyan switches in the SECOND stage always have a destination address (ID of memory module) that is equal to 0xx
Messages arriving into the TWO LOWER Banyan switches in the SECOND stage always have a destination address (ID of memory module) that is equal to 1xx

The destination address (ID of memory module) is then further identified by the second stage:
If the routing bit (second bit in address) is equal to 0 (zero), then the message is routed towards the TWO UPPER Banyan switches in the THIRD stage
If the routing bit (second bit in address) is equal to 1 (one), then the message is routed towards the TWO LOWER Banyan switches in the THIRD stage

Therefore:

Messages arriving into the MOST UPPER Banyan switche in the THIRD stage always have a destination address (ID of memory module) that is equal to 00x
Messages arriving into the SECOND UPPER Banyan switche in the THIRD stage always have a destination address (ID of memory module) that is equal to 01x
Messages arriving into the THIRD UPPER Banyan switche in the THIRD stage always have a destination address (ID of memory module) that is equal to 10x
Messages arriving into the FOURTH UPPER (most lower) Banyan switche in the THIRD stage always have a destination address (ID of memory module) that is equal to 11x

The Banyan switches in the third (and final) stage sorts out the last bit of the address.
(It's so elementary, my dear Watson :-))

A 16 x 16 Delta switch
Here is how you connect a 16x16 Delta MIN:
Number of Banyan Switches in a n x n Delta switch
- A n x n Delta switch has log₂(n) number of stages
- The number of switches in the first stage is n/2
- The number of switches in a n x n Delta switch is therefore equal to: