The Direct Memory Access technique
 

  • From Wikipedia:

      • Direct memory access (DMA) is a feature of computer systems that allows certain hardware subsystems to access main system memory (= RAM) independent of the CPU.

  • In "normal" English:

      • The DMA technique uses a (smarter) device - other than the CPU - that can initiate memory (data) transfer

    The DMA technique is implemented using a DMA Controller (= a processor !) that can initiate a read/write bus protocol !!

Modern computer systems always use DMA for IO communication

Review:   data transfer from an input devices

  • In an input operation, data is transfered from an input device to the memory:
     

  • However, the transfer operation is not as in the figure above (because this requires the input device to initiate a bus protocol)

Review:   data transfer from an input devices

  • In an input operation, a "smart" device (e.g., the CPU) will first initiate a read operation to the input device:

  • (Because the input device is not capable to initiate a bus protocol)

Review:   data transfer from an input devices

  • Then the CPU will write the data to the memory:
     

  • Note: a similar procedure is used to transfer data to an output device

Data transfer using the DMA technique

The DMA controller (= a "smart" device like the CPU (Central Processing Unit)):

  • The DMA technique uses a DMA controller:
     

  • The DMA controller can initiate a (data transfer) bus cycle !!!

Data transfer using the DMA technique

How the data transfer occurs in the DMA technique:

  • The CPU first programs the DMA controller with a data transfer command:
     

  • (The DMA controller is like a helper processor for the CPU !!!)

Data transfer using the DMA technique

How the data transfer occurs in the DMA technique:

  • After receiving the data transfer command, the DMA controller will perform the data transfer:

  • The DMA controller first reads the IO device

Data transfer using the DMA technique

How the data transfer occurs in the DMA technique:

  • The DMA controller will then write the data to memory:
     

  • (The CPU is free (available) to do "other" more important computations)

The DMA Controller

  • The DMA Controller (a.k.a. DMA) is a special purpose "helper" processor (i.e., a specialized processor that can only do one specific task)

    (A DMA can be manufactured very cheaply !!)

  • The only operation that a DMA (can) perform is:

      • Transfer data between 2 addressable devices on the system bus

  • The most common usage of DMA is:

      • Transfer data between memory and an IO device

  • But, a DMA can also:

      • Copy (a large amount of) data from some memory location to another memory location

Non-dedicated DMA controller

  • A non-dedicated DMA controller is a stand-alone DMA controller that can communicate with multiple/different IO devices:

          

  • A non-dedicated DMA controller typically manages multiple slower IO devices (like keyboard, printer, etc)

Non-dedicated DMA controller

  • A dedicated DMA controller is an integraded DMA controller that controls one specific (type) of IO device(s):

          

  • A dedicated DMA controller typically manages one or more faster IO devices (= hard-disks !!)

Structure of a DMA controller

A DMA controller has the following structure:

All special purpose registers on the DMA controller can be accessed (read/write) by the CPU

Capability of a DMA controller to initiate a bus protocol

The DMA controller has the ability to initiate a READ/WRITE operation on the system bus:

I.e.: the DMA Controller can send address and READ/WRITE req to memory and IO devices!

Functions of the special purpose registers in the DMA controller

  • Status register: readable by the CPU to determine the status of the DMA controller (idle, busy, etc)

  • Command register: writable by the CPU to issue a command to the DMA controller

  • Data register: readable and writable.

    It is used to buffer the data that is being transfered between the memory and an IO device.

  • Address register: contains the next memory location of memory where from or where to the data will be transfered.

    The Address register will be programmed by the CPU before the CPU issues a READ/WRITE command to the DMA controller.

  • Count register: contains the number of bytes that need to be transfered.

Operation of a DMA controller

Actions taken by the DMA when performing a READ (from memory) transfer to an IO device:

 

The DMA first read the memory data at the address at its Address Register using a bus cycle

Operation of a DMA controller

Actions taken by the DMA when performing a READ (from memory) transfer to an IO device:

 

The DMA then writes the data from its Data register to the IO device

Operation of a DMA controller

Actions taken by the DMA when performing a READ (from memory) transfer to an IO device:

 

The DMA decrements the Count reg and increments the Address reg to prepare to the next transfer.      The DMA will repeat the steps until Count Reg = 0

Operation of a DMA controller

Actions taken by the DMA when performing a WRITE (to mem) transfer from an IO device:

 

The DMA first read the data from the IO device

Operation of a DMA controller

Actions taken by the DMA when performing a WRITE (to mem) transfer from an IO device:

 

The DMA then writes the data in Data reg to memory at the address given by its Address Reg

Operation of a DMA controller

Actions taken by the DMA when performing a WRITE (to mem) transfer from an IO device:

 

The DMA decrements the Count reg and increments the Address reg to prepare to the next transfer.      The DMA will repeat the steps until Count Reg = 0

How does the CPU use a DMA controller
 

  • The DMA controller is like a helper processor to the CPU !!

  • How does the CPU delegate the IO operation to the DMA controller:

      1. The CPU first setup the task that the DMA controller must do by writing the DMA's Address Register and Count Register

        The Address Register and Count Register specify the location and amount of data of the data transfer operation

      2. The CPU then issues a READ or WRITE command to the DMA controller

        This will make the DMA controller active and the DMA controllor will execute the operations specified in the last 6 slides.

Example: how the CPU delegate the IO operation to the DMA
 

Suppose the special purpose registers of the DMA is memory-mapped to the following addresses:

(Since the CPU will not use the DMA's Data Register, we don't need to assign it an address...)

Example: how the CPU delegate the IO operation to the DMA

An example of the CPU instructing the DMA that controls a printer to print a string: 

  movw    r1, #:lower16:myString
  movt	  r1, #:upper16:myString // r1 = address of string
  movw    r0, #:lower16:0x1408
  movw    r0, #:upper16:0x1408   // r0 = addr of DMA's Addr Reg
  str     r1, [r0]               // Set up start address in DMA

  mov     r1, #6                 // 6 = # characters in string
  movw    r0, #:lower16:0x1404
  movw    r0, #:upper16:0x1404   // r0 = addr of DMA's Count Reg
  str     r1, [r0]               // Set up Count in DMA

  mov     r1, #1                 // 1 = Read memory to output
  movw    r0, #:lower16:0x1400
  movw    r0, #:upper16:0x1400   // r0 = addr of DMA's Cmd Reg
  str     r1, [r0]               // Send READ command to DMA

   .... // At this moment, the DMA controller will 
        // transfer the data from memory to the printer

myString: .asciz "ABCDEF"      // The ASCII codes of the string

This is what the computer system must do to execute System.out.print("ABCDEF") !!

Example DMA IO operation

  • We have a simulated computer system than is used to teach the Operating System course

  • The simulated computer system implements a DMA control

  • This demo shows how the CPU starts the DMA to output a string: 

        /home/cs355001/demo/DMA-IO/m68000-print.s  

  Compile:  /home/cs355001/bin/as255-m68000 m68000-print
  Run:      /home/cs355001/bin/m68000

    The CPU of the simulated computer system is a M68000 CPU and has different assembler instructions

    But I will walk you through the code

Can a computer program that has performed an IO operation continue running safely ??
 

  • Recall: using DMA for IO communication

      • The running computer program that is executing an IO operation (e.g.: System.out.print("...")) will start the DMA to transfer data stored in memory to/from an IO device (e.g.: printer)

  • Recall also:

      • An IO device operates very slowly compared to the CPU

  • $64,000 question:

      • Can a computer program that has just executed an IO operation continue its execution safely ???

Can a computer program that has performed an IO operation continue running safely ??
 

The answer is NO when the computer program has performed an input operation: 

  // Computer program (e.g.: Java)

  i = in.nextInt( ); // Performs an input operation

  i = i + 1; // Must use correct input value !!!

When a program performs an input operation, the program must wait until the data has been read in to the memory before the program can continue execution

  • A program that performs an Input Operation cannot continue running until the IO operation is completed !!!

How do a stop a program from running ???????

Problem statement and background information

  • Problem description:

      • When a program performs an input (IO) operation, the program cannot continue running:

        • The input data will take time to be read from an input device into the memory

        •  If  the program continues execution, the program will operate with invalid data - the because data is not yet available !

      • The computer system must pause a running program !!!

        • How do you pause a running program ???

  • Background information:

      • Before we can tackle the problem on how to pause a running problem, we need to cover a lot of background information in the next set of slides...