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Tri-State-Buffers

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• Armed with the knowledge that outputs of digital circuit cannot be connected together because they have low impedance, let us try to design the connection that will allow the CPU to perform read and write operations on the memory

  CPU can retain information in registers, so it has D-flipflops and so do the computer memory.

  When the CPU read some data from memory, the value stored in the D-flipflops in the memory is transfered into some D-flipflops in the CPU.

  Similarly, when the CPU writes some data to memory, the value stored in the D-flipflops in some register in the CPU is transfered into some D-flipflops in the memory.

  I will illustrate the subtleties using a 1-bit register and a 1-bit memory element....

• There will be 1 wire used to transfer data between the 1-but register in the CPU and the 1-bit memory. Here is the situation before making any connections:

  

• To allow the CPU to read data from memory, we will need to connect the output of the memory to the input of the register in the CPU. (Recall from CS255, data read from memory will be stored in a register - e.g., in the "MOVE" instruction from M68000),

  So we need to make the following red connections:

  

  So far, so good: we did not connect any outputs together and the connections can be made "safely".

• To allow the CPU to write data to memory, we will need to connect the output of the register in the CPU to the input of the Dff in the memory.

  So we need to make the following blue connections:

  

  Uh oh.... we connected 2 outputs together and the connections CANNOT be made "safely".

• The solution to this project is a gadget called tri-state-buffer, and it is basically a variable resistor

  All material has some resistance to electricity and people have constructed circuits that consists of "sandwiching" a number of "positively" and "negatively" dotted silicon. These material form a "PN junction" and the width of this junction can be increased and decreased by removing or injecting free electrons, respectively. The wider the junction, the higher the resistance of the dotted material becomes, and conversely.

  You can read more on the PN-junction at PBS: click here

• Anyway, the resistance of a tri-state-buffer can be controlled by an external control signal.

  If the control signal is equal to 1, then the tri-state-buffer conducts very well. The result is akin to the situation where the input and output of the tri-state-buffer are connected by a piece of copper wire.

  If the control signal is equal to 0, then the tri-state-buffer conducts very poorly. The result is akin to the situation where the input and output of the tri-state-buffer are connected by a piece of match stick or nylon wire. It behaves as if the input and the output are disconnected... (because disconnected circuit end points have extremely high resistance...

  The following figure summarizes the operation of the tri-state-buffer:

  

• You can experiment with this tri-state-buffer gadget with the following logic-sim circuit program:

  /home/cs355001/bin/cs355sim /home/cs355001/demo/circuits/Tri-State-Buffer

  Please note that this particular tri-state-buffer works as follows:

  • Control = 0: low resistance
  • Control = 1: high resistance resistance

  So the meaning of the control signal is reverse (that should not be a big deal to adjust to...)

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• Now I can show you the connection that will allow the CPU to do both reading and writing with the memory:

  

• You can experiment the above circuit using the following logic-sim circuit file. The controls are as follows: click here

  /home/cs355001/bin/cs355sim /home/cs355001/demo/circuits/bi-dir-bus

  The Dff on the left represents the data inside the CPU

  The Dff on the right represents the data inside the RAM (computer) memory

  The functions of the keys are as follows:

  • key 0: store a 1 into CPU register's Dff
  • key 1: store a 0 into CPU register's Dff
  • key 2: Write signal (clock) of CPU register's Dff
  • key 3: Control of CPU register's Dff's tri-state-buffer
  • key 6: store a 1 into memory's Dff
  • key 7: store a 0 into memory's Dff
  • key 8: Write signal (clock) of memory's Dff
  • key 9: Control of memory's Dff's tri-state-buffer

  To transfer data from CPU to memory (left to right):

  Active the CPU's tri-state-buffer with key 3 Then toggle the clock of the memory with key 8

  To transfer data from memory to CPU (right to left):

  Active the memory's tri-state-buffer with key 9 Then toggle the clock of the CPU with key 2

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• Experiment...
  • Try turn both tri-state buffers on:

    toggel key 3 to turn tri-state buffer 1 on toggel key 7 to turn tri-state buffer 2 on

    You will see an error message from EDiSim warning you that 2 components are trying to change the same (output) signal