Example instruction that has an out-of-order program flow execution: mov PC, #4

The next few slides will show the execution of the mov PC, #4 instruction.

Notice that:   the Instruction Execution Cycle perform the same sequence of steps as the previous example

The initial situation:

The CPU has (just) finished executing the instruction in the IR register

The CPU must now fetch (and execute) the next instruction -- (assume 1 instruction is 4 bytes long)

The initial situation:

Notice that:   Program Counter (PC) = 44

Therefore: the next instruction (4 bytes) is fetched from memory address 44

Step 1: the instruction fetch step

The CPU sends the value of its PC on the address bus (to read memory address 44)

The CPU also sends a READ command on the control bus to the memory

Step 1: the instruction fetch step (continued)

In response, the memory will send the data in memory address 44 on the data bus

The data on the data bus is the binary code of the next instruction that the CPU must execute !!!

Step 1: the instruction fetch step (almost final)

The CPU will store the data on the data bus in its Instruction Register

Result:   the CPU has fetched the next instruction....     but:   the CPU still needs to do one more thing....

Step 1: the instruction fetch final step

Increased the Program Counter to the address of the "new" next instruction

Because we assumed that an instruction is 4 bytes long, PC will be increased by 4

Taking stock:   what has been achieved by the Instruction Fetch step

(1) The CPU has fetched an (next) instruction into the Instruction Register (IR)

(2) The PC points to the new "next instruction" (i.e.: the CPU has prepared for the next instruction exec cycle)

Step 2: the instruction decode step

In the instruction decode step, the CPU determines what operation it needs to perform

The details of the instruction decode step is explained in CS355...

Step 3: the operand fetch step

The CPU will transfer the value 4 to input of the ALU

The ALU will copy the input value 4 to its output (that's how a mov (= move) instruction is executed)

Step 4: the instruction execute step

The CPU will store the result 4 to the destination register PC.

Note:   the instruction mov PC,#4 has now been executed by the CPU !!

Taking stock :   what exactly have been achieved by the instruction execution cycle

(1) The CPU has fetched and execute the "next" instruction which was mov PC,#4

      The effect of the execution was updating program counter PC with the ( new) value  4 

Taking stock :   what exactly have been achieved by the instruction execution cycle

The CPU has has updated the PC to the address of the "new" next instruction to  4 

Therefore:   the CPU has "made a jump" to address 4 in memory !!! (Result: out-of-order program flow)