The CPU can only perform these 2 operations on the memory are:
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The amount of data read/written can be: 1 byte, 2 bytes, 4 bytes, or 8 bytes (not used in CS255)
In this webpage, we will study:
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Each (electrical) wire of the system bus can be used to transmit a electrical signal:
Computers use 2 signal levels: (1) a high (voltage) is used to send the (binary) number 1:
The meaning of the value 1 remains to be determined
Computers use 2 signal levels: (2) a low (voltage) is used to send the (binary) number 0:
The meaning of the value 0 remains to be determined
The signals transmitted on the address bus represent the address (in binary) of the memory that the CPU wants to access (= read or write):
The signals transmitted on the data bus represent the data (= information) that is being transfered between the CPU and the memory:
The control bus has many control signals and the following 3 signals is essential for our discussion:
Enable: indicate whether the
CPU is
active (= 1) or
idle (= 0)
MEM/IO:
indicate whether the CPU want to
access the
memory (= 1) or
an IO device (= 0)
R/W:
indicate the operation performed
(R/W=1 means
read and
R/W=0 means
write)
When the CPU is not performing any transfer operation, the Enable signal = 0
The CPU is idle
How the CPU sends out the command "Read data from memory address 4" on the system bus:
Enable=1,
Mem/IO=1, R/W=1
signals
indicates: a
read operation to the memory
The
address bus
sends out the
address 4 (in binary)
How the memory will respond to "Read data from memory address 4" command:
The memory will send the data stored in the memory location 4 back to the CPU using the data bus
Finally: the CPU receives the requested data:
The CPU will also
change
Enable=0
to indicate
"no operation" being
performed.
The CPU can
perform
another
transfer operation if
it need to... (and so on)
How the CPU sends out the command "Write 1010101011111111 to memory location 4":
Enable=1,
Mem/IO=1, R/W=0
signals
indicates: a
write operation to the memory
Address bus
sends out
address 4 (in binary) and
data bus
sends out
1010101011111111
How the memory will respond to the "Write data to memory address 4" command:
The memory will
store the
data into the
memory location 4
Afterwards, the
CPU will
end the
Write command by
sending out
Enable=0